LTSpice ideal models

A list of LTSpice ideal models I find very useful during hardware development and simulation. Sometimes, moving to ideal models is a helpful approach to focus on circuit functionality. This allows for a better understanding of the most relevant properties of the component, supporting then the selection process.

simulation

ltspice

Diode

The simplest ideal diode can be modeled in the following way

.model MyDiode1 D(Ron=1m Roff=1Meg Vfwd=1m Vrev=1Meg)

This is very ideal! LTSpice will work on a three region model whose transitions are not smooth. You could encounter integration or convergence issues during simulation, especially if your circuit is complex. To avoid this, let's write a slightly more ideal model.

.model MyDiode2 D(Ron=1m Roff=1Meg Vfwd=1m Vrev=1Meg Ilimit=10 Revilimit=10 Epsilon=0.5 Revepsilon=0.5)

With this model, you can see how LTSpice applies smooth transition between diode operating regions.

nMOSFET

Well, MOSFETs are very intricated as there are several parameters and many of them are related to physical properties of the device. However, I often found useful the following description

.model MyMOS VDMOS(Vto=1.0 Kp=100 Rd=1m Rs=1m Rg=1m Cgdmax=1n Cgdmin=300p Cgs=1n Cjo=1n Rb=10m)

Here I specify the threshold voltage, the transconductance value, drain, source and gate resistance, minimum and maximum Miller capacitance values, gate-source and zero-bias body diode capacitances, diode resistance. This should be enough to run a simulation avoiding all those parameters that increase complexity and distract you from the circuit functionality.

When you are sure your circuit behaves as expected, then you can substitute the ideal model with the one of the chosen component.

Voltage controlled switch

Sometimes, ideal switches are better than transistor: they remove any non-ideality. However they generate abrupt state changes that, in some cases, should be made smoother to improve simulation and ensure convergence.

.model MySw1 SW(Vt=2.5 Vh=0.5 Ron=1u Roff=100Meg)

R_on and R_off are pure resistive elements, placed dynamically in the circuit according to the switch state. V_t is the center threshold level, making the switch changing its state; V_h is the input hysteresis: switch turns on at V_t+V_h and turns off at V_t-V_h.

Again, since switches turn on and off very quickly, high current spikes could appear in your circuit, partially invalidating it. To make this components more similar to a silicon-based device, you can add some extra parameters, as shown below:

.model MySw2 SW(Vt=2.5 Vh=0.5 Ron=1u Roff=100Meg Lser=10n Vser=0 Ilimit=10)

L_ser is a series inductance, useful to limit the current peaks during state transitions. V_ser is a series voltage added by the switch. I_limit is the maximum current allowed in the component; if this limit is reached, current is clamped.

Gates

AND, OR, XOR, BUF, INV

The LTspice built-in digital AND, OR, XOR, BUF, INV logic gates have the following common properties:

Vhigh=1 Vlow=0 Ref=0.5 Td=0

To define the output impedance characteristics use:

Rhigh=10 Rlow=5

or, if you have the same resistance for both high and low side then use:

Rout=10

To define the dynamic characteristics use:

Trise=5n Tfall=5n

or Rhigh+Rlow or Rout with Cout then use:

Cout=0

Another version allows you to specify the tau (in this case do not use R+Cout combination nor Trise/Tfall definition), use instead:

tau=1m

Schmitt trigger

The LTspice built-in digital SCHMITT, SCHMTBUF, SCHMTINV Schmitt triggers have the same properties as gates but you can define threshold voltage and hysteresis too. Thresholds will be defined as Vt-Vh and Vt+Vh.